Hi all,
I am trying to get a reliable hardware sync signal out of a Chronos 1.4 and I am not sure whether I am misunderstanding what
Camera details:
The setup is:
The goal is to get a hardware signal from the camera that lets the DAQ confirm that each external trigger actually advanced the camera to the next segment. In other words, for a 3-segment capture, I would like to see 3 external trigger pulses into the camera and 3 corresponding camera-side acknowledgements out of IO2.
One thing that confused us at first was the
Here is what we see with
The DAQ path itself seems fine. As a sanity check, we toggled IO2 at 1 Hz using
The problem appears to be specific to
In a 3-segment capture, the camera does fill all 3 segments and the DAQ sees the 3 external trigger pulses going into the camera. However, IO2 with
By contrast,
So I think there are two separate questions here:
At the moment, our fallback is to count the trigger pulses going into the camera and then verify the camera segment count in software after capture. That works, but a hardware acknowledgement from the camera would be much cleaner.
Thanks.
RIH
I am trying to get a reliable hardware sync signal out of a Chronos 1.4 and I am not sure whether I am misunderstanding what
nextSeg is meant to do, or whether there is a firmware/hardware issue on our unit.Camera details:
Code:
Chronos 1.4
Serial: 02236
Firmware: 0.7.0
Mode: segmented recording with external trigger
Code:
IO2 / AUX pin 5 -> NI USB-6363 PFI0 and/or ai7
AUX pin 6 -> DAQ common / ground
IO2 mapping -> {source: <source>, drive: 2, debounce: false, invert: false}One thing that confused us at first was the
drive setting. On our setup, drive=0 leaves IO2 effectively high-Z, and the DAQ reads about 0 V even when the source is set. With drive=2, static output works correctly.Here is what we see with
drive=2:| IO2 source | Camera state | What we see |
|---|---|---|
alwaysHigh | live view | ~4.21 V steady |
recording | segmented mode, armed | ~4.21 V steady |
shutter | segmented mode, armed | ~4.75 V pulses at about 10 kHz |
shutter | live view only | ~0 V |
nextSeg | 3-segment external-trigger capture | PFI0 counts 0 edges; ai7 only shows small peaks around trigger times |
The DAQ path itself seems fine. As a sanity check, we toggled IO2 at 1 Hz using
alwaysHigh and inversion. The analogue input and the PFI0 counter both counted exactly the expected number of edges on the same wiring.The problem appears to be specific to
nextSeg.In a 3-segment capture, the camera does fill all 3 segments and the DAQ sees the 3 external trigger pulses going into the camera. However, IO2 with
source=nextSeg does not produce a usable external pulse. On the DAQ, PFI0 counts 0 edges. On ai7, the peaks near the trigger times are only about 1.5 V, which is below the USB-6363 PFI high threshold. In a separate 1 MS/s capture, we did not see any clear nextSeg pulse above about 0.5 V.By contrast,
shutter looks electrically healthy. With source=shutter, IO2 produces full-amplitude pulses while segmented recording is armed. That looks suitable as a frame-sync output, but it is not the same thing as a per-segment acknowledgement. At our current settings it pulses once per frame, not once per segment.So I think there are two separate questions here:
- Is
nextSegsupposed to be an externally usable TTL pulse on IO2 for each segment advance? - If so, should it be full swing, similar to
alwaysHigh,recording, orshutter? - If
nextSegis not intended as an external signal, is there another IO2 source that gives one externally countable pulse per accepted segment trigger? - Separately, is
shutter/ Frame Sync expected to remain valid as a full-swing frame clock during segmented armed recording?
nextSeg and treat frame sync and segment verification as separate problems.At the moment, our fallback is to count the trigger pulses going into the camera and then verify the camera segment count in software after capture. That works, but a hardware acknowledgement from the camera would be much cleaner.
Thanks.
RIH
